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Select a package and heatsink that maintains the junction temperature below the rating with a maximum expected ambient temperature. The ISL will immediately shut dxtasheet when the Fault Counter reaches a count ratasheet 4 when the system is restarting from an S5 state into the active, or S0, state.
The FB pin is also monitored for under and over-voltage events. Next are the small datashewt components which connect to sensitive nodes or supply critical bypass current and signal coupling.
The output is user-adjustable by means of external resistors down to 0. This sequence is very similar to the mechanical start soft-start sequencing.
The feedback resistors should be located as close as possible to the FB pin with vias tied straight to the ground plane as required.
Depending on the method of lead termination at the edge of the package, a maximum 0. The lower switch realizes most of the switching losses when the converter is sinking current see the equations below. The maximum RMS current required by the regulator may be closely approximated through the at173 equation: This pin is monitored for under-voltage events.
The maximum rDS ON at the highest junction temperature. The minimum value for CSS can be found through the following equation: For reliable operation, select bulk capacitors with voltage and current ratings above the maximum input voltage and largest RMS current required by the circuit. Any parasitic inductance in the switched current path generates a st9173 voltage spike during the switching interval.
It is primarily designed for computer applications powered from an ATX power supply. High frequency decoupling capacitors should be placed as close to the power pins of the load as physically possible. It is recommended that a minimum capacitance of 0.
(PDF) AT9173 Datasheet download
These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. The goal of the compensation network dqtasheet to provide a closed loop transfer function with the highest 0dB crossing frequency f0dB and adequate phase margin. During this interval the difference between the inductor current and the transient current level must be supplied by the output capacitor.
OCP on the Switching Regulator?
The voltage at this pin is regulated to 0. If the Fault Reset Counter reaches a count of at91773 another fault occurs, then the Fault Counter is cleared to 0. An external resistor divider is used to scale the output voltage relative to the reference voltage and feed it back to the inverting input of the error amplifier, refer to the Typical Application on page 3.
All dimensions are in millimeters. This method provides a rapid and controlled output voltage rise. L minus L1 to be equal to or greater than 0.
However, the Equivalent Series Inductance ESL of these capacitors increases with case size and can reduce the usefulness of the capacitor to high slew-rate transient loading. There are two sets of critical components in the ISL switching converter. Their voltage rating should be at least 1.
This allows the VTT rail to float. With power devices switching efficiently at kHz, the resulting current transitions from one device to another cause voltage spikes across the interconnecting impedances and parasitic circuit elements. The following equations give the approximate response time interval for application and removal of a transient load: Shoot-Through Protection A shoot-through condition occurs when both the upper and lower MOSFETs are turned on simultaneously, effectively datazheet the input voltage to ground.
AT98C Datasheet(PDF) – DATASHEETBANK
See Tech Brief TB This allows the ISL to attempt at least one full soft-start sequence to restart the faulted regulators. ACPI compliant sleep state control? With a properly selected divider, Dataeheet can be set to any voltage between the power rail reduced by converter losses and the 0. Thermal shutdown is integrated.
High ground currents are conducted directly through the exposed paddle of the QFN package which must be electrically connected to the ground plane through a path as low in inductance as possible.
The counts that are required to reset the Fault Reset Counter represent 8 soft-start cycles, as one soft-start cycle is clock cycles. Dedicate one solid layer, usually a middle layer of the PC board, for a ground plane and make all critical component ground connections with vias to this layer.
The digital soft start sequence will then begin.
However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. I x ESR If the output voltage desired is 0. Some capacitor series available from reputable manufacturers are surge current tested. These should be selected based upon rDS ONgate supply requirements, and thermal management requirements.
Estimate Phase Margin – Repeat if Necessary. The switching regulator also has overvoltage and over current protection.